Andes Technology today announces the AndesCore™ AX66 out-of-order superscalar multicore processor IP supporting the RVA23 ...

EnSilica is pleased to announce that it has been awarded an ASIC design services contract with a prestigious supplier of ...

The Ultra-Low-Power DM RF transceiver IP in TSMC22 ULL is designed to meet 2.4 GHz standards like Bluetooth Classic (BR/EDR), Bluetooth Low Energy, 802.15.4 PHY Layer (e.g. ZigBee), and proprietary ...

TSMC today announced consolidated revenue of NT$759.69 billion, net income of NT$325.26 billion, and diluted earnings per share of NT$12.54 (US$1.94 per ADR unit) for the third quarter ended September ...

The DB-I2C-S-SCL-CLK is an I2C Slave Controller IP Core focused on low power, low noise ASIC / ASSP designs requiring the configuration & control of registers with no free running clock. The ... The ...

EnSilica, a leading chip maker of mixed signal ASICs (Application Specific Integrated Circuits), is pleased to announce that ...

While flash memory is still the most popular non- volatile memory (NVM), several applications are beginning to adopt other ...

Has this happened to you? You decide to include third-party commercial IP cores to reduce risk and time to market. You spend months defining requirements, ...

Thalia and Siemens are collaborating to incorporate the AMALIA IP reuse design automation platform for analog and ...

Copenhagen, October 16, 2024 – Chip Interfaces is pleased to announce that the Industry’s first commercially available ...

DTechnology has announced a collaboration with Samsung Foundry, Arm, and Rebellions to develop a next-generation AI CPU chiplet platform based on chiplet technology.

Datacenters are constantly challenged to balance power demands with the growth of AI workloads, the increasing cost and ...