Semiconductor Engineering

Design Optimal ESD Protection With Context-Aware SPICE Simulation

Electrostatic discharge (ESD) is a major reliability concern for modern ICs. Ensuring the robustness of ICs in an ESD event by providing adequate ESD protection is proving to be a major challenge for ...

These $67 work boots are saving construction workers from slippery disasters

The Bogs Shale Mid work boots, featuring composite toe protection and ESD properties, are now $67.73 with reviewers noting ...
Electronic Design

Automated ESD protection verification for 2.5D and 3D ICs

2.5D/3D IC designs present new challenges in both ESD design and verification. Advanced automated ESD verification methodology accurately and effectively evaluates ESD protection in 2.5/3D IC designs.
EDN

Diodes afford ESD protection for automotive networks

Nexperia’s PESD1ETH10 diodes protect sensitive electronics in 10Base-T1S in-vehicle networks from ESD damage. With a maximum capacitance of 0.4 pF, they also support higher-speed 100Base-T1 and ...
Semiconductor Engineering

Pre-Silicon Verification Of Die-to-Die IP With Novel ESD Protection

All major foundries have adopted the programmable electrical rule checker (PERC) as the pre-silicon electrostatic discharge (ESD) signoff tool for IP and chip designs. This concept of rule checking ...